In conventional circuit mounting boards (e.g., printed circuit boards (PCB's)) a ground plane is formed on one or more layers of the board. Such ground planes can be formed on the top or bottom surfaces of boards (especially using basic two layer boards). Also, such ground planes can be formed on interior layers of multi-layer (three or more layers) boards. Such ground planes are satisfactory for certain purposes, but they impose certain significant design limitations. For example, they prohibit the formation of signal traces on the layer containing the ground plane. On a two-layer board this can be a particularly cumbersome design limitation because it effectively prevents circuit structures and electronic components from being formed on or attached to the ground plane layer. This cuts the available board space for such circuitry and components in half.
One conventional approach to solving this problem involves replacing portions of a single layer ground plane with two-layer ground grid. FIGS. 1(a)–1(d) illustrate aspects of this approach. FIG. 1(a) is a side view of a typical two-layer circuit board 100 incorporating a conventional ground grid. The board 100 includes a top surface 101T and a bottom surface 101B separated by a substrate core portion 110. The top and bottom surfaces (101T, 101B) each have a pattern of ground traces formed thereon that are electrically connected by vias passing through the core 110 to form a ground grid. FIG. 1(b) depicts a top plan view of the top surface 101T of the board 100 shown in FIG. 1(a). It is to be emphasized that the depicted illustration depicts an exaggerated implementation of a conventional ground grid. Commonly, such ground grids are implemented on only small portions of a circuit board. Returning to FIG. 1(b), a pattern of ground traces 102 is formed on the surface 101T. The ground traces 102 are configured in a substantially parallel arrangement so that all the ground traces 102 are parallel to one another. Such a configuration can be referred to as a “Y”-axis board configuration. Vias 103 are formed in the surface 101T to penetrate through the core 110 and which are filled with an electrically conductive material (e.g., copper) to effect electrical connection with another set of ground traces formed on the bottom surface 101B of the board 100.
FIG. 1(c) depicts a bottom plan view of the bottom surface 101B of the board 100 shown in FIG. 1(a). A pattern of ground traces 104 (depicted by the alternating dotted dashed lines) is formed on the surface 101B. The inventors point out that said alternating dotted dashed lines are intended to represent unbroken electrical paths (being specifically intended to differentiate from the straight (unbroken) lines 102 of FIG. 1(b)). The ground traces 104 of the bottom surface 101B are configured in a substantially parallel arrangement with all of the ground traces 104 of the bottom surface 101B. Such a configuration can be referred to as an “X”-axis board configuration. The vias 103 have openings in the surface 101B to facilitate electrical connection with the ground traces 103 of the top surface 101T of the board 100. The connection of the top ground traces 102 with the bottom ground traces 104 forms a unified ground grid that leaves room on both the top and bottom surfaces for the formation of signal traces and electronic component attachment contacts.
Importantly for the conventional approach disclosed in the foregoing Figures is the orientation of the top ground traces 103 with the bottom ground traces 104. These conventional approaches are limited to all ground traces (e.g., 102, 104) being parallel to all of the other ground traces on the same level. Additionally, the top and bottom ground traces are configured so that they are perpendicular to one another. Reference is made to the figurative illustration FIG. 1(d) which schematically depicts a conventional ground grid arrangement. FIG. 1(d) is a representation intended to capture the relationship between the ground traces 102 of the top layer and the ground traces 104 (depicted by dotted and dashed lines) of the bottom layer connected through the vias 103. The interconnection of the top ground traces 102 and the bottom ground traces 104 at the vias (tie points) 103 form a plurality of generally square ground structures 105 that are used to provide electrical ground return paths, devices, and components as needed.
One significant drawback to the configuration depicted in FIG. 1 is that when all ground traces on a level are formed parallel to each other they impose significant restrictions on the configuration of any signal traces formed on the same level. This is especially troublesome on two-level boards which cannot rely on the use of levels without ground grids to circumvent the restrictions imposed by the ground grids. The same problem also exists on multi-level boards having three or more layers, but under certain circumstances the difficulties can be more easily alleviated.
FIGS. 2(a) and 2(b) can be used to illustrate one example of the problem. FIG. 2(a) schematically illustrates a circuit board configuration 200 formed on a level of a circuit board. An “X” configured pattern of ground lines 201 is depicted on a level of the board. Also, a set of contacts 202 (perhaps associated with a specific device or components) is formed on the same level of the board. As can be seen, the placement of the ground lines 201 significantly impedes the formation of signal traces to and from the contacts 202. For example, signal traces cannot be formed extending in the “y” axis direction because they would cross the “X”-axis oriented ground lines 201. Additionally, signal traces cannot easily be formed extending in the “x”-axis direction because they would cross over other contacts 202. In comparison, FIG. 2(b) presents a contrasting orientation. FIG. 2(b) shows the orientation of the same set of contacts 202 but the ground lines 203 are configured in a “Y”-axis oriented configuration. Such an arrangement easily permits the formation of signal traces (which extend in the “y”-axis direction) which can be electrically connected to the set of contacts 202. In some cases, the designer can simply reorient the contacts to accommodate the ground grid. However, in many cases, a designer cannot simply reorient the contacts to accommodate the ground grid. Designers are frequently constrained by space, design, electrical, as well as many other considerations that prevent signal traces from being routed in a manner that most ideally suits the orientation of the ground grid.
In such cases, it would be advantageous to create a ground grid that can accommodate a wider range of signal trace design configurations. Thus, there is a need for ground grid embodiments that can accommodate a wider range of signal trace configurations as well as a wider range of electronic component orientations while still achieving a reasonable level grounding in a electronic mounting board.